Course description
Introduction to RISC-V
RISC-V is a free and open instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration. This course will guide you through the various aspects of understanding the RISC-V community ecosystem, RISC-V International, the RISC-V specifications and how to help curate and develop them, and the technical aspects of working with RISC-V both as a developer and end-user.
"Introduction to Risc-V" is designed for RISC-V enthusiasts, hardware nerds, and anyone else interested in the details of how an open source ISA is breaking down barriers and opening up new opportunities in the microprocessor world.
This course contains a high level overview of RISC-V International, as well as how to get started working with the RISC-V ISA. The course gives you the foundational knowledge you need to effectively engage in the RISC-V community, contribute to the ISA specifications, or to develop the wide range of RISC-V software projects. After completing this course, you will have a better understanding of the terminology, resources, and workflow you will need to complete your RISC-V journey.
Upcoming start dates
Who should attend?
Prerequisites
A solid grounding in computer architecture will be helpful
Training content
- Getting to Know RISC-V
- The RISC-V Story
- The RISC-V Community
- Developing RISC-V
- RISC-V in Practice
- Final Exam
Course delivery details
This course is offered through The Linux Foundation, a partner institute of EdX.
1-2 hours per week
Costs
- Verified Track -$149
- Audit Track - Free
Certification / Credits
What you'll learn
- Describe the nature, history, and ongoing practices of RISC-V as a technology, an international organization, and a community of developers and implementers.
- Explain how RISC-V technical working groups are organized.
- Explain the basis of community-based open specification development, and how the RISC-V ISA is developed as an open specification.
- Understand how people and organizations can benefit from and contribute to RISC-V.
- Put the RISC-V ISA into action with a simulator booting the Linux operating system.
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